1. Field
The present invention relates, in general, to a printed circuit board (PCB) having a landless via hole and a method of manufacturing the same, and, more particularly, to a method of manufacturing a PCB having a landless via hole, in which the via hole has no upper land, by filling a via hole formed in an insulating layer with a conductive metal and then forming a seed layer with a metal that is able to be selectively etched with the metal charged in a via.
2. Description of the Related Art
With the development of electronic industries, the demand for increased functionalization and miniaturization of electronic parts is rapidly increasing. According to this trend, PCBs or circuit patterns are required to be increasingly dense, and thus, various methods of realizing a fine circuit pattern are being devised, proposed, and applied.
Among such methods of realizing a fine circuit pattern, the present invention discloses a method of removing the upper land of a via hole to thus achieve a high-density circuit pattern with a landless via hole.
FIG. 1 is a top plan view illustrating a conventional PCB, in which the upper land of a via is formed. As seen in FIG. 1, because circuit patterns 105a are formed at small widths on a substrate but include the upper lands 104b of via holes 104a around the via holes 104a, fineness is not realized in the corresponding region. For example, in the case where the diameter of the via hole 104a is about 65 μm, the upper land around the via hole is formed at a width of about 165 μm in consideration of process error. In this way, because the upper land is formed, a high-density circuit pattern is difficult to realize on the substrate. Thus, a via arrangement is designed in a zigzag type (FIG. 1) so that land portions do not overlap each other, but limitations are imposed on the ability to realize a high-density circuit pattern, attributable to the wider upper land.
Accordingly, a landless via hole from which the upper land is excluded has been introduced. Korean Patent No. 688702 discloses a method of manufacturing a PCB with a landless via hole, in which a via hole has no upper land, using a photosensitive resist which is loaded in the via hole.
FIG. 2 is a perspective view illustrating the landless via hole disclosed in Korean Patent No. 688702. As illustrated in FIG. 2, the landless via hole is formed such that a circuit pattern 1 is connected to the inner plating layer of a via hole 4 to thus realize a fine circuit pattern having no upper land. However, the case where the circuit pattern is connected to the inner plating layer of the via hole 4 is problematic in that the probability of poor contact is high and the process for manufacturing such a structure is complicated.
Thus, a PCB having a landless via hole and a method of manufacturing the same, in which the upper land of a via is removed in order to form a fine circuit pattern, and further, the connection between the via and the circuit pattern is good, are required.